naps.cores.cmv12k package¶
Submodules¶
naps.cores.cmv12k.cmv12k_rx module¶
naps.cores.cmv12k.cmv12k_spi module¶
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class
naps.cores.cmv12k.cmv12k_spi.Cmv12kSpi(*args, src_loc_at=0, **kwargs)¶ Bases:
nmigen.hdl.ir.Elaboratable-
elaborate(platform)¶
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enable_test_pattern= driver_method()¶
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get_spi= driver_method()¶
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read_reg= driver_method()¶
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set_exposure_value= driver_method()¶
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set_number_frames= driver_method()¶
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set_readout_configuration= driver_method()¶
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set_train_pattern= driver_method()¶
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write_reg= driver_method()¶
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write_regs= driver_method()¶
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naps.cores.cmv12k.pixel_remapper module¶
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class
naps.cores.cmv12k.pixel_remapper.Cmv12kPixelRemapper(*args, src_loc_at=0, **kwargs)¶ Bases:
nmigen.hdl.ir.ElaboratableRemaps one output port (if top and bottom outputs of the cmv12k are used, instantiate this twice!) to provide a linear output.
Generally the CMV12000 sends its data out in bursts. The output format of the CMV12000 (and therefore the input for this core) depends on two factors: the number of lanes used and the presence of subsampling / binning. The burst length is described by line_length / n_lanes_per_side so for the non line_lengh of 4096 and 16 lanes per side (the default beta configuration) this equals to a burst_length of 256. One Lane always sends adjacent pixels of bust_length out.
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elaborate(platform)¶
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naps.cores.cmv12k.s7_phy module¶
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class
naps.cores.cmv12k.s7_phy.Cmv12kPhy(*args, src_loc_at=0, **kwargs)¶ Bases:
nmigen.hdl.ir.Elaboratable-
elaborate(platform)¶
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class
naps.cores.cmv12k.s7_phy.HostTrainer(*args, src_loc_at=0, **kwargs)¶ Bases:
nmigen.hdl.ir.Elaboratable-
data_alignment= driver_method()¶
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elaborate(platform)¶
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initial_alignment= driver_method()¶
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set_clock_delay= driver_method()¶
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train= driver_method()¶
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validate= driver_method()¶
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class
naps.cores.cmv12k.s7_phy.IDelayIncremental(*args, src_loc_at=0, **kwargs)¶ Bases:
nmigen.hdl.ir.Elaboratable-
elaborate(platform)¶
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